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TI Analog New Product Introduction
 
ADS54RF63 - 12-bit, 550 MSPS ADC with Buffered Input and RF Input Sampling Ability
 TI Analog New Product Introduction
 
ADS54RF63 - 12-bit, 550 MSPS ADC with Buffered Input and RF Input Sampling Ability
 
The ADS54RF63 is a high performance 12-bit, 550MSPS ADC with superior linearity (SFDR) for high IF and low RF input frequencies – up to and beyond 1GHz. The ADC provides 80dBc SFDR with a -1 dBFS 450MHz input at 500MSPS, and provides 70 dBc SFDR for IFs up to 900MHz. Because of its linearity, the ADS54RF63 offers 9.5 effective bits (ENOB) of resolution for IFs up to 1GHz. Built in TI’s BiCom3 process, the ADS54RF63 also features a buffered analog input, creating flat input impedance across IFs and eliminating track-and-hold kickback.  This makes it much easier for customers to design and implement wide bandwidth analog front-ends to drive the 2.2V differential input of the ADC.
 
Value Statement
 
The ADS54RF63 is pin compatible to the 12-bit, 500MSPS ADS5463 and 14-bit, 400MSPS ADS5474, providing customers an easy upgrade path to a higher linearity or higher speed ADC. The device is also compatible to the ADS5444 and ADS5440. The ADS54RF63 features a DDR LVDS (Double Data Rate) output along with a data ready signal, minimizing I/O traces and pin consumption on follow-on FPGA, ASIC or TI’s GrayChip products.
 
Features and Benefits
 

Features
Benefits
Unmatched linearity and SNR above 500Mhz IF
·         64.1 dBFS SNR, 80 dBc SFDR – 450MHz, 500MSPS
·         62.5 dBFS SNR, 70 dBc SFDR – 900MHz, 500MSPS
·         61.9 dBFS SNR, 75 dBc SFDR – 450MHz, 550MSPS
High linearity above 1GHz IF allows for high IF and direct RF sampling architectures
Highest speed 12-bit device available: 550MSPS tested
High Efficiency at Full 6-A Load Current
TI BiCom3tm Technology
 
Ideal for Powering Performance Processors that
Require Tight Voltage Regulation
Synchronizes to External Clock
Eliminates Beat Noise
Adjustable Slow Start Time
Reduces Inrush Currents During Startup

 
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