FPGA Innovation at the Edge: Opening the New Data Path with Lattice Avant
“Enormous amounts of data are being generated every day by billions of connected sensors, devices, and systems supported by AI algorithms, creating an accelerated need for intelligence at the Edge. This trend requires developers and OEMs to look for more flexible and adaptable solutions.”
Companies today are challenged by a fast-evolving technology landscape, a seemingly insatiable hunger for more connectedness and intelligence, and an explosion of data generated at the Edge. Moreso than ever before, system designers and developers need efficient and flexible processing solutions that can keep pace with this accelerated demand for innovation.
These customer needs are what inspired us to create the Lattice Avant™ platform, extending our low power leadership to span the small and mid-size density FPGA portions of the market.
Advancing Our FPGA Innovation
The Lattice Avant platform builds on the innovation we’ve driven into the market with the Lattice Nexus™ platform in the small FPGA segment. Architected from the ground up, Lattice Avant will enable designers with the power efficiency, performance, and small size leadership they know and expect from Lattice, with advanced connectivity and optimized compute capabilities at higher capacities than previous Lattice devices. This enables us to address a broader set of customer applications than ever before.
And, just as the Nexus platform enabled an accelerated cadence of product introductions, with 5 Nexus-based device families introduced to-date, we plan to introduce a steady stream of Avant-based FPGAs (in addition to more Nexus-based devices) in the years to come.
A Closer Look at Lattice Avant
The Lattice Avant platform is designed at every level to deliver power efficiency, advanced connectivity, and optimized compute capabilities not previously available in mid-range FPGAs. While there is a lot of innovation worked into the platform, key architectural highlights include 25G SERDES and parallel I/O standards that address a wide variety of interface, and external memory interface support including DDR4, DDR5, and LPDDR4 along with legacy standards.
Addressing Key Customer Needs
Lattice Avant was born out of customer demand for compelling mid-range FPGA solutions for Communications, Computing, Industrial, and Automotive applications. When discussing their needs, it became clear that they were increasingly concerned with three key things: power efficiency, performance, and form factor – which aligned perfectly with what Lattice does best.
As compared to existing FPGAs serving the mid-range FPGA segment, Lattice Avant features:
- Market-leading power efficiency with up to 2.5X lower power than similar class competitive devices helping system and application engineers achieve power and thermal design efficiencies, improve operating costs, and enhance reliability
- Best-in-class performance delivering up to 2X faster throughput than similar class competitive devices, providing increased bandwidth and enabling reduced number of SERDES links, system cost and size.
- Industry leading form factor offering up to 6X smaller package sizes compared to similar class competitive devices to enable size efficient system designs
And, knowing that time-to-market is always a key customer concern, Avant will leverage existing Lattice software solutions and application-specific solution stacks they’re already know and understand. This familiarity will help reduce adoption time and accelerate development.
Available today, Lattice Avant™-E FPGAs
The Lattice Avant platform is architected for scalability that will enable the rapid development of multiple new device families, starting today with the launch of the Lattice Avant™-E FPGA family. Lattice Avant-E FPGAs are designed to solve key customer challenges at the Edge by combining class-leading power efficiency, size and performance with an optimized feature set tailored to the needs of Edge applications like data processing and AI.
To learn more about Lattice Avant-E FPGAs and how it enables hardware optimized end-to-end implementation at the Edge, you can read the blog here.
as always feel free to contact our FAE at tal@telsys.co.il.
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